Aspects of the present disclosure relate to FinFET device structures, and more particular aspects relate to making FinFETs having p-channel field-effect transistor (pFET) and n-channel field effect transistor (nFET) regions.
As complementary metal-oxide silicon (CMOS) semiconductor devices and manufacturing processes become smaller, following the trend to reduce the size of channel nodes, channel mobility of electrons becomes more difficult. Different channel materials may be utilized in complementary nFET and pFET devices in order to create controllable, reliable semiconductor devices. Utilizing various techniques, silicon (Si) and silicon germanium (SiGe) content in various regions may be carefully controlled, allowing for reliable and efficient semiconductor device fabrication and structures.